1. Field of Art
The present invention relates to a rework method of an array substrate for a display device and an array substrate formed by the rework method. Particularly, the present invention relates to a rework method of an array substrate, which can prevent damage to a common electrode layer (Vcom ITO) in a jumping passivation hole (PAS hole) area for interconnecting the common electrode layer and a common electrode (Vcom) metal line of a non-active area at the time of the rework process due to a defect of the array substrate.
2. Description of the Related Art
With the development of an information society, various types of requirements for a display device of displaying an image are increasing. Recently, various display devices, such as a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), and an Organic Light Emitting Diode Display Device (OLED), are being used.
Among those display devices, a Liquid Crystal Display (LCD) device includes an array substrate including a thin film transistor, which is a switching device for controlling on/off of each pixel area, an upper substrate including color filters and/or black matrixes, a display panel including a liquid crystal layer formed between the array substrate and the upper substrate, and a driving unit for controlling the thin film transistor. In an LCD device, alignment of the liquid crystal layer is controlled according to an electric field applied between a common voltage (Vcom) electrode and a pixel (PXL) electrode provided at a pixel area, so as to adjust the transmissivity of light and thereby form an image.
In the array substrate, an Active Area (AA) including one or more pixels and a Non-active Area (NA) are defined. Further, a plurality of Gate Lines (GL) and a plurality of Data Lines (DL) cross each other to define Pixels (P) on an inner surface of the active area AA of the array substrate, which is usually called a lower substrate, and each intersection between the gate lines and the data lines is provided with a Thin film transistor T, which has a one-to-one correspondence with and is connected to a transparent pixel electrode (not shown) in each pixel P.
On the array substrate, a plurality of layers, such as a gate metal layer, a semiconductor layer, a source/drain metal layer, a pixel electrode layer, and a common electrode layer, are formed to create such thin film transistors and wire lines as described above, and an inter-layer insulation layer or a protection layer may be formed between every layer.
Meanwhile, there is a Twisted Nematic (TN) scheme, in which liquid crystal is injected between an array substrate having a pixel electrode formed thereon and an upper substrate having a common voltage electrode formed thereon, separated from each other, and liquid crystal molecules in a nematic phase are driven in a direction perpendicular to the substrates. However, a liquid crystal display device of the twisted nematic scheme as described above is disadvantageous in that it has a narrow viewing angle of about 90 degrees.
In this regard, there is an In-Plane Switching (IPS) type liquid crystal display device which drives liquid crystal molecules in a direction parallel to the substrate to thereby increase the viewing angle to 170 degrees or larger. The IPS type liquid crystal display device basically includes a pixel electrode and a common voltage electrode simultaneously formed on a lower substrate or an array substrate. However, there are two types of IPS type crystal display devices including one type in which both the pixel electrode and the common voltage electrode are formed on the same layer and a Fringe Field Switching (FFS) type in which both the electrodes are formed to be horizontally spaced apart from each other with one or more insulation layers between them and one of the electrodes has a shape of a finger.
Further, a connection pad for connection to a driving unit disposed at an inner or outer portion of the substrate, a signal application pad for applying a reference voltage or reference signals, and various pads for measurement may be formed on a part of the Non-Active area (NA) outside of the Active Area (AA) in the array substrate.
Meanwhile, a common voltage metal line for applying a common voltage (Vcom) is formed on the non-active area of the array substrate, and this common voltage metal line should be connected to a common electrode disposed in the active area.
As described above, a jumping passivation hole (PAS hole) for electrically interconnecting the common electrode layer and the common voltage metal line of the non-display area is formed, and a common electrode and a pixel electrode are in contact with and stacked on each other in the jumping passivation hole area.
Meanwhile, when a defect occurs in a pixel electrode layer, which is the highest electrode layer of an array substrate, a rework process is performed to remove and then re-establish the pixel electrode layer, i.e. the highest electrode layer. In the rework process, the common electrode and the pixel electrode in the jumping passivation hole as described above may be simultaneously removed to cause contact failure between the re-established (reworked) pixel electrode layer and common electrode layer.